STDF analytics

Open a lot and read what it did: yield by site and bin, Cpk with a histogram for every parametric test, first-fail and test-time paretos, an outlier screen for passing parts that sit outside the population, limit drift against the spec and the program, trends across lots and wafer maps. Then turn the statistics into limit proposals you review — ATE·IQ™ never writes them into the program.

Input
Nine files, 3,894 parts — six wafers of one wafer-sort lot and three final-test lots. The lots on this page are demonstration data: seeded synthetic lots with defects planted on purpose.
What ran
Yield by site and bin, trends across lots and wafer maps.
What it found
Yield by site, first final-test lot: site 3 at 79.17 % against 93–96 % on the other three — a socket leak planted in the demonstration lot. Top failing tests, latest final-test lot. Test 1060 fails 29 times yet reads Cpk 1.06: Cpk assumes one normal population, so on a bimodal test the fail count is the signal.
STDF library lot-to-lot trend strip, split into wafer probe and final test, with the hard-bin drift strip beside it
The STDF library: nine files, 3,894 parts — six wafers of one wafer-sort lot and three final-test lots. The trend strip splits by insertion, and the hard-bin drift strip sums across lots.

The analyses

Upload an STDF file or sync a repository and it is read natively on the engineer's machine — plain or gzipped, no external parser. Every analysis is deterministic: same file, same answer, and the lot page, the traceability dashboard and the IG-XL agent's tools read the same results.

AnalysisWhat it gives you
Yield by site and binOverall and per-site yield, hard- and soft-bin paretos, and the lot's device, tester and program identity.
Parametric statisticsMean, standard deviation, Cp and Cpk per test with an inline histogram — multi-pin parametric tests counted, not left out.
First-fail and test-time paretosThe test gating the most parts, and the tests taking the largest share of test time — candidates to speed up, never to skip.
Outlier screenDynamic-PAT robust limits estimated from the population itself; parts that pass the program's limits but sit outside the population. Too few samples reports insufficient data, never a reassuring “0 outliers”.
Limit driftThe limits the lot actually ran, against the spec and the program as it stands now, joined on test number with units reconciled.
Cross-lot trends and wafer mapsOne test followed across lots; a die map per wafer with spatial-cluster detection, each cluster named with its dominant bin.
Site ↔ socket overlayEach test site mapped to its load-board socket, so a per-site skew is named against a socket rather than a site number.

The analyses are also tools the IG-XL agent calls, nine of them for STDF, so “which test is gating yield?” or “did the guard band reach production?” are answered from the same deterministic tables the lot page shows.

Lot detail

Yield-by-site panel for the first final-test lot, with site 3 marked red
Yield by site, first final-test lot: site 3 at 79.17 % against 93–96 % on the other three — a socket leak planted in the demonstration lot.
Top failing tests for the latest final-test lot, with fail counts, pass rates and Cpk
Top failing tests, latest final-test lot. Test 1060 fails 29 times yet reads Cpk 1.06: Cpk assumes one normal population, so on a bimodal test the fail count is the signal.
Die map for wafer 1 of the demonstration wafer-sort lot, with fails around the rim and a marked lower-right cluster
Wafer 1 of the wafer-sort lot: 409 dies, 108 fails, fails around the rim and a marked lower-right cluster. A marked cluster is a place to look, not a verdict.

Feeding statistics back to the program

Turn a lot into a proposed limit pair for every parametric test: computed from the lot's statistics, clipped so it never exceeds the spec, and classified — tighten the guard band, widen within the spec, no change, or insufficient data. A population that itself sits outside the spec is classified as a process that cannot support it: an engineering problem, not a limits change. The arithmetic is deterministic and the tool has no write path to the program; apply a change yourself, or have the IG-XL agent stage it for your Apply.

The lots on this page are demonstration data: seeded synthetic lots with defects planted on purpose, so every finding can be checked against what was put there.

Boundaries The tools show where parts sit, not why they sit there. The IG-XL agent's figures come from these deterministic tools; the answer around them is written by a language model, so check a figure that matters against the tool.