Schematic view

Read a load board the way you review one: the DUT on the first sheet, every series termination in signal order, both legs of each Kelvin connection, and the tester channel on each net taken from your saved channel plan. ATE·IQ™ never edits an imported board: change it in the tool that drew it and import it again. A re-import of the same Cadence Allegro, IPC-2581, ODB++ or Specctra DSN board keeps the earlier version in History.

The DUT sheet of a schematic synthesized from the netlist of a real Cadence Allegro board
A public Cadence Allegro 17 board, read from its Fabmaster export: the schematic ATE·IQ synthesized from its netlist, with the DUT sheet first and the rest on a grid.

Drawn with the conventions a DIB needs

Tester channel, then series resistor, then DUT pin: the channel flag sits on the tester side of the resistor, so the drawing never shows a channel bypassing its termination. Force and sense are drawn as separate nets to the instrument, never collapsed into one wire. A channel you saved in the channel plan is drawn as decided; one the auto-assigner only proposed is marked as proposed, so a suggestion is never mistaken for a decision. Each sheet is checked for a wire of one net touching another's.

Imported boards are changed at the source

ATE·IQ reads, views and checks a load board; it does not lay one out. ATE·IQ never edits an imported board: change it in the tool that drew it and import it again. A re-import of the same Cadence Allegro, IPC-2581, ODB++ or Specctra DSN board keeps the earlier version in History: the design header lists the newest 50 states and brings any one back, and a restore is recorded too, so going back never loses what came after. A KiCad or PDF import is replaced when it comes in again.

Where schematics come from

Cadence Allegro netlist and Fabmaster exports import natively, with no Cadence licence, into a design with a synthesized schematic; KiCad schematics are picked up from synced repositories, with the layout when a matching board sits beside them; IPC-2581, ODB++ and DSN layouts bring in copper and nets; a PDF drawing is shown as drawn. Print any schematic to PDF from the browser. See EDA import & export.

Boundaries The engine draws load boards with ATE conventions; it is not a general-purpose schematic-capture replacement. A netlist without a drawing of its own gets a synthesized view of its nets, not a redrawn design, and a PDF drawing cannot be re-laid out. Drawing a schematic never invents copper: the layout belongs to the tool that drew it.